Synopsys Awarded 2025 Global Technology Innovation Leadership in Analog In-Memory Computing

Frost & Sullivan has recognized Synopsys with the 2025 Global Technology Innovation Leadership Award for its pioneering AI-driven Electronic Design Automation (EDA) suite and cloud-enabled design environment. This award highlights Synopsys’ leadership in accelerating the development of analog in-memory computing (AIMC), a next-generation solution critical for advanced AI chip design. The company’s innovations align closely with the United Nations Sustainable Development Goals (SDGs), particularly SDG 9 (Industry, Innovation, and Infrastructure) and SDG 12 (Responsible Consumption and Production), by promoting energy-efficient and sustainable AI computing technologies.

Recognition Criteria and Impact

The Technology Innovation Leadership Award is presented annually to companies demonstrating exceptional strategy development and execution, resulting in measurable improvements in market share, customer satisfaction, and competitive positioning. Synopsys earned this distinction by delivering tools that effectively address analog design complexity, substantially reducing design time and enhancing productivity for AIMC-based system-on-chip (SoC) architectures. This advancement supports SDG 9 by fostering innovation and sustainable industrialization in semiconductor design.

Synopsys’ Analog Design Solutions Driving Sustainable Innovation

Synopsys’ analog design solutions are trusted by startups, leading design houses, and semiconductor foundries worldwide. Their comprehensive and integrated suite of technologies accelerates innovation in energy-efficient AI chip development, contributing to SDG 7 (Affordable and Clean Energy) through the promotion of energy-saving computing systems.

Key Technologies Recognized

1. Synopsys PrimeSim: The industry’s fastest GPU-accelerated SPICE simulator offers advanced machine learning-based High-Sigma Monte Carlo analysis and library characterization. Utilizing NVIDIA GH200 Superchips, it achieves up to 15x speed-up, with projections of 30x speed-up on the NVIDIA Grace Blackwell platform. This enables SPICE-level circuit simulation in hours instead of days, significantly accelerating innovation and productivity in AI chip design.
2. Synopsys Custom Compiler: When paired with the PrimeWave Design Environment, it provides robust analog and mixed-signal design capabilities. These tools facilitate seamless integration, flexible simulation, and reliability analysis, supporting the creation of innovative and sustainable chip designs.
3. Synopsys Cloud: This cloud-based platform offers instant browser access to the full Synopsys EDA suite, compute infrastructure, and preconfigured flows under a flexible pay-per-use model. Synopsys Cloud has enabled customers to reduce their time to results by an average of 40%, enhancing development efficiency and resource optimization in line with SDG 12.

Additional Advanced Capabilities

• ASO.ai: AI-driven layout-aware optimization accelerates analog IP migration across process nodes, supporting sustainable manufacturing practices.
• Robust Mixed-Signal Flow: Features real-time view swapping that enables 5X to 10X faster verification, improving design accuracy and reducing resource consumption.
• Hybrid Timing Circuit Simulation: Provides multifold acceleration in high-bandwidth memory timing verification, enhancing performance while minimizing energy use.
• Synopsys NanoTime: Offers exhaustive transistor-level static timing analysis, ensuring reliability and efficiency in chip design.

Conclusion

Synopsys’ innovative analog and mixed-signal design solutions significantly contribute to advancing sustainable AI technologies, supporting multiple Sustainable Development Goals by promoting innovation, energy efficiency, and responsible production in semiconductor design. For further information, visit synopsys.com.

1. Sustainable Development Goals (SDGs) Addressed or Connected

1. SDG 9: Industry, Innovation and Infrastructure
   • The article focuses on technological innovation in analog in-memory computing and AI chip development, which directly relates to building resilient infrastructure, promoting inclusive and sustainable industrialization, and fostering innovation.
2. SDG 7: Affordable and Clean Energy
   • The emphasis on energy-efficient AI computing systems aligns with the goal of ensuring access to affordable, reliable, sustainable, and modern energy for all.
3. SDG 12: Responsible Consumption and Production
   • The article’s mention of cloud-enabled design environments and pay-per-use models suggests efficient resource use and reduction of waste in production processes.

2. Specific Targets Under Those SDGs

1. SDG 9 Targets
   • Target 9.5: Enhance scientific research, upgrade the technological capabilities of industrial sectors, especially in developing countries.
   • Target 9.4: Upgrade infrastructure and retrofit industries to make them sustainable, with increased resource-use efficiency and greater adoption of clean and environmentally sound technologies.
2. SDG 7 Targets
   • Target 7.3: By 2030, double the global rate of improvement in energy efficiency.
3. SDG 12 Targets
   • Target 12.2: Achieve the sustainable management and efficient use of natural resources.
   • Target 12.5: Substantially reduce waste generation through prevention, reduction, recycling, and reuse.

3. Indicators Mentioned or Implied to Measure Progress

1. For SDG 9:
   • Increase in market share and customer satisfaction as indicators of innovation adoption and industrial growth.
   • Reduction in design time and increased productivity (e.g., 15x to 30x speed-up in simulation) as measures of technological advancement.
2. For SDG 7:
   • Energy efficiency improvements in AI computing systems, implied by the development of energy-efficient analog in-memory computing.
3. For SDG 12:
   • Reduction in time to results by 40% through cloud-based solutions, implying resource efficiency and waste reduction.
   • Use of cloud pay-per-use models indicating better resource management and consumption patterns.

4. Table: SDGs, Targets and Indicators

Source: engineering.com